Massively Parallel MicroLED — Reshaping AI Interconnect
GaN MicroLED
Native light source
Si APD
High-sensitivity receiver
⚡
WAS Architecture
Wide & Slow
1-4 Gbps per lane
Self-Contained Source
No external ELS
On-chip MicroLED
On-chip MicroLED
Extreme Density
Micron-pitch arrays
Massive lane count
Massive lane count
Dual Supply Chain
GaN + Si capacity
Step-change cost
Step-change cost
Proven Know-How
Display / CIS packaging
10k-channel control
10k-channel control
High-Performance Link
Si-APD at 10 Gbps
High gain, high sensitivity
High gain, high sensitivity
SerDes Eliminated
Direct-drive
Nanosecond latency
Nanosecond latency
<1
pJ/bit power
51.2T
Module bandwidth
10
Tbps/mm²
Ushering in a new era of massively parallel optical interconnect: high density, SerDes-free, thermally unconstrained.